A liquid crystal display (LCD) has been widely applied to products or components having a display function including a mobile phone, a tablet computer, a TV set, a display, a notebook computer, a camera, a video camera, a digital photo frame, and a navigator and so on due to its advantages of low power consumption, light weight, thin thickness, non electromagnetic radiation and pollution-free and so on.
In the existing liquid crystal display, the pixel array can comprise gate scanning lines and series data lines vertically and horizontally crossed with each other. Herein, in order to realize a progressively scanning of the pixel array, a gate line driving circuit is usually adopted to provide a scanning signal to the gate scanning line of the pixel array.
The existing gate driving circuit usually adopts a design of gate driver on array (GOA) to integrate a gate switch circuit of a thin film transistor (TFT) on the array substrate of the display panel, so as to form a scanning driving for the display panel. Such a gate switch circuit integrated on the array substrate by using the GOA technique is also referred to as a GOA circuit or a shift register circuit.
At present, a structure of a shift register unit which is commonly used can be shown in FIG. 1. The shift register unit mainly comprises six transistors and one capacitor (6T1C). By taking the six transistors being P-type transistors as an example, such kind of shift register unit can be controlled by adopting two clock signals (CLK1, CLK2) having inverse phases, wherein the clock signal CLK1 is used for controlling turn-on or turn-off of transistors M1 and M2, and the clock signal CLK2 is used for controlling turn-on or turn-off of a transistor M3. When the transistor M1 is in a turn-on state, a frame start signal STV can control the turn-on or turn-off of transistors M4 and M5. When the transistor M2 is in a turn-on state, a low voltage signal VGL turns on a transistor M6 through the transistor M2, and a high voltage signal VGH at this time can be outputted to an output terminal OUTPUT of the shift register unit through the transistor M6.
Such a kind of shift register unit has the following deficiency: when the shift register unit operates at different phases, some key nodes inside the shift register unit (such as nodes A, B and C in FIG. 1) will produce a potential suspension phenomenon due to the effect of residual potential at the previous phase, thereby having influence on an output signal at the output terminal, and causing the output signal unstable.